1. Field of the Invention
The present invention relates to a semiconductor devices and, more particularly, to a semiconductor wafer and die that include an integrated circuit and two or more different MEMS-based semiconductor devices.
2. Description of the Related Art
To fabricate conventional analog and digital CMOS semiconductor chips, the same fabrication steps are performed to each of a large number of integrated circuit surface regions that are located on the top surface of a CMOS semiconductor wafer. The fabrication steps, in turn, form a corresponding number of identical CMOS structures, which each realize identical CMOS circuits, on the top surface of the semiconductor wafer.
FIG. 1A shows a plan view that illustrates a prior-art semiconductor wafer 100. FIG. 1B shows an exploded view of a portion of the top surface of semiconductor wafer 100. As shown in FIGS. 1A and 1B, wafer 100 has a large number of spaced-apart, integrated circuit surface regions 110 that are arranged in rows and columns.
In addition, as further shown in FIG. 1B, a large number of CMOS structures 112, which each realize identical CMOS circuits, are formed on the top surface of wafer 100 so that a CMOS structure 112 is formed in each integrated circuit surface region 110. Further, each CMOS structure 112 includes a large number of electrical pads 114 that are connected to the CMOS circuit, and encircle the periphery of integrated circuit surface region 110 and CMOS structure 112.
Once the CMOS structures have been formed, CMOS semiconductor wafer 100 is diced or cut along each of a large number of horizontal and vertical streets 116H and 116V that separate the integrated circuit surface regions 110 from each other to form a large number of dice. Each individual die is then placed in a package, such as a flip-chip package when the die has been bumped, to form a CMOS semiconductor chip.
A micro-electromechanical system (MEMS) is a microscopic machine that is fabricated using the same types of steps (e.g., the deposition of layers of material and the selective removal of the layers of material) that are used to fabricate conventional analog and digital CMOS circuits.
For example, a MEMS can realize a pressure sensor by using a diaphragm with a number of piezoresistors. In operation, when the pressure changes, the change in pressure changes the strain placed on the piezoresistors. The change in strain deforms the band gap structures of the piezoresistors. The deformed band gap structures change the mobility and density of the charge carriers which, in turn, changes the resistivity. The changes in resistivity are detected by a Wheatstone Bridge, which varies the output voltage VO in response to the changes in resistivity. Other examples of MEMS include microphones, joysticks, and temperature sensors.
As with the CMOS devices, MEMS devices are formed by performing the same fabrication steps to each of a large number of MEMS regions that are located on the top surface of a MEMS semiconductor wafer. The fabrication steps form a corresponding number of identical MEMS structures, which each realize identical MEMS functions, on the top surface of the MEMS semiconductor wafer. The MEMS semiconductor wafer is then diced to form a large number of dice. Each individual die is then placed in a package to form a MEMS semiconductor chip.
A MEMS semiconductor chip is often placed adjacent to a CMOS semiconductor chip on a printed circuit board so that the MEMS semiconductor chip can be electrically connected to the CMOS semiconductor chip to provide the MEMS functionality to the CMOS semiconductor chip.
For example, when electrically connected together, the MEMS semiconductor chip can provide MEMS signals which indicate changing physical conditions, such as changes in pressure, while the CMOS semiconductor chip can process the MEMS signals to provide useful information.
Although the use of adjacent CMOS and MEMS semiconductor chips provides satisfactory performance, the use of two separate chips consumes a significant amount of printed circuit board area. One approach to solving this problem is to mount the MEMS semiconductor chip on a central area of the top surface of an underlying CMOS semiconductor chip.
One drawback of this approach, however, is that the top surface of the CMOS semiconductor chip must be large enough to accommodate the footprint of the MEMS semiconductor chip. Although some CMOS chips are quite large, such as microprocessor chips, this is not the case for all CMOS chips. Thus, there is a need for additional methods of reducing the amount of printed-circuit-board surface area consumed by adjacent CMOS and MEMS semiconductor chips.